--- 格式版本: 2 标题: "Nvidia expands NVLink Fusion strategy to supercharge custom silicon memory" 原文链接: "https://www.sdxcentral.com/news/nvidia-expands-nvlink-fusion-strategy-to-supercharge-custom-silicon-memory/" 发布日期: "2026-08-27" 发布时间校准状态: "found" 发布时间需复核: "否" 发布时间来源: "llm:local:strict_original_body" 发布时间证据: "August 27, 2026 ByBen WodeckiHave your say" 发布时间校准原因: "文章标题下方明确标注作者和日期“August 27, 2026”，这是文章发布时间，且位于正文内容中，可信度高。" 发布时间校准置信度: "1" 发布时间候选数量: 36 发布时间严格候选数量: 13 发布时间原页读取状态: "source template page reused from URL open" 发布时间未找到原因: "" 发布时间校准时间: "2026-08-28T18:00:28+08:00" 发布时间仲裁状态: "confirmed" 发布时间仲裁尝试次数: 1 发布时间仲裁耗时毫秒: 64143 发现时间: "2026-08-28T17:58:27+08:00" 入库时间: "2026-08-28T10:01:54.485Z" 来源平台: "SDxCentral 搜索" 搜索渠道: "source_template" 搜索词: "site:sdxcentral.com XPU" 匹配关键词: - "NVLink" - "XPU" - "HBM" - "Marvell" - "deployment" - "performance" - "bandwidth" - "AI" 相关厂家: - "NVIDIA" - "AWS" - "Meta" 相关专家: [] 内容类型: "网页" 抓取工具: "Jina Reader" 清洗工具: "Jina Reader Markdown + Defuddle/Readability 正文提取" 原始附件: [] AI优质: "否" AI打分: 54 AI分档: "非优质" AI质检状态: "不通过" AI打分理由: "正文主线是NVLink Fusion新增NVHBM基底裸片及其在机架级XPU基础设施中的应用，给出内存控制器移入HBM堆栈、带宽提升最高30%、功耗降低最高15%、主裸片可用面积增加最高30%等细节，并提及AWS/Annapurna Labs及Trainium4合作。来源为专业媒体二手报道；历史库前一日已收录NVIDIA官方发布和技术博客，核心架构、规格、合作伙伴及用途均已完整出现，本文没有独家采访、实测、量产节点或其他可核验增量。命中同事件无新增的二手重复稿否决项，封顶54分，当前页面不具备独立保留价值。" AI质检模型: "gpt-5.6-sol" AI质检时间: "2026-08-29T13:24:47+08:00" AI主题相关性: 18 AI来源权威性: 10 AI新颖性: 1 AI技术细节: 13 AI商业部署信号: 4 AI完整性: 8 AI评分提示词版本: "v17-精简生产版" AI评分提示词SHA256: "48fb9777f386026761b4873eaff30807694fb11e9b352d7c69bf2dfde750cc7d" AI评分知识库版本: "knowledge_base_v1-20260819+runtime.21" AI评分知识库SHA256: "487728693f4df0c97aa67b7709fff9c0672c58b62588baec6a9cca34ef03d43b" AI评分知识库检索词: "[\"NVIDIA\",\"AWS\",\"NVLink\",\"XPU\",\"site:sdxcentral.com XPU\",\"HBM\",\"HBM4\",\"rack-scale\",\"RAS\",\"GPU\",\"Meta\",\"Marvell\"]" AI评分知识库命中: "[{\"id\":\"runtime-52343a012216677e078ffdd2\",\"title\":\"NVIDIA NVLink Fusion Expands With NVHBM Custom High-Bandwidth Memory\",\"sourceType\":\"ai_excellent_article\",\"time\":\"2026-08-26\",\"matchedTerms\":[\"NVIDIA\",\"AWS\",\"NVLink\",\"XPU\",\"HBM\",\"HBM4\",\"rack-scale\",\"RAS\",\"GPU\"],\"rank\":-24.309993111075027},{\"id\":\"runtime-676f90ee5f88ebab3b504077\",\"title\":\"NVIDIA NVLink Fusion Brings NVHBM to Next-Generation AI Infrastructure\",\"sourceType\":\"ai_excellent_article\",\"time\":\"2026-08-26\",\"matchedTerms\":[\"NVIDIA\",\"NVLink\",\"XPU\",\"HBM\",\"HBM4\",\"rack-scale\",\"RAS\",\"GPU\"],\"rank\":-18.466406619889952},{\"id\":\"july-correct-0095\",\"title\":\"Inside NVIDIA Rubin GPU Architecture: Powering the Era of Agentic AI\",\"sourceType\":\"labeled_article\",\"time\":\"2026-07\",\"matchedTerms\":[\"NVIDIA\",\"NVLink\",\"HBM\",\"HBM4\",\"rack-scale\",\"RAS\",\"GPU\",\"Meta\"],\"rank\":-15.196483241420024},{\"id\":\"runtime-5b8a3335997f3b1b31558541\",\"title\":\"STORE You Probably Forget How Cheap Memory Used To Be – And Is Not So Now\",\"sourceType\":\"ai_excellent_article\",\"time\":\"2026-08-25\",\"matchedTerms\":[\"NVIDIA\",\"AWS\",\"XPU\",\"HBM\",\"RAS\",\"GPU\",\"Meta\",\"Marvell\"],\"rank\":-14.776285799145327},{\"id\":\"july-correct-0020\",\"title\":\"NVIDIA Vera Rubin：引領代理 AI 的時代\",\"sourceType\":\"labeled_article\",\"time\":\"2026-07\",\"matchedTerms\":[\"NVIDIA\",\"NVLink\",\"HBM\",\"RAS\",\"GPU\",\"Meta\"],\"rank\":-13.38703213937367}]" AI摘要: "Nvidia发布NVHBM基板创新，扩展NVLink Fusion策略，让定制XPU在机架级系统中通过HBM获得更高内存带宽。相比HBM4e，NVHBM可提升最高30%带宽并降低15%功耗；" AI摘要模型: "ali-deepseek-v4-flash" AI摘要时间: "2026-09-07T02:08:17.332Z" 采集批次: "2026年8月28日17点57分58秒" 采集批次ID: "20260828-175758-597" 去重键: "https://www.sdxcentral.com/news/nvidia-expands-nvlink-fusion-strategy-to-supercharge-custom-silicon-memory" --- Title: Nvidia expands NVLink Fusion strategy to supercharge custom silicon memory URL Source: https://www.sdxcentral.com/news/nvidia-expands-nvlink-fusion-strategy-to-supercharge-custom-silicon-memory/ Markdown Content: This website uses cookies to ensure you get the best experience on our website. [Learn more](https://www.cookiesandyou.com/) [Got it!](https://www.sdxcentral.com/news/nvidia-expands-nvlink-fusion-strategy-to-supercharge-custom-silicon-memory/) # * Channels * [The AI Channel](https://www.sdxcentral.com/ai/) * [The Networking Channel](https://www.sdxcentral.com/network-sdn/) * [The Cybersecurity Channel](https://www.sdxcentral.com/security/) * [The Distributed Infrastructure Channel](https://www.sdxcentral.com/distributed-infrastructure/) * [The Telecom Channel](https://www.sdxcentral.com/telecom-nfv/) * [The Silicon & Supercomputing Channel](https://www.sdxcentral.com/storage-silicon/) * [The Cloud & Storage Channel](https://www.sdxcentral.com/cloud/) * Media * [News](https://www.sdxcentral.com/news/) * [Analysis](https://www.sdxcentral.com/analysis/) * [Editors' Views](https://www.sdxcentral.com/control-plane/) * [Industry Views](https://www.sdxcentral.com/opinions/) * [Video Interviews](https://www.sdxcentral.com/video-interviews/) * [Broadcasts](https://www.sdxcentral.com/broadcasts/) * [On Demand Broadcasts](https://www.sdxcentral.com/broadcasts/past/) * [Explainers](https://www.sdxcentral.com/sdx-explainers/) * [MarketWatch](https://www.sdxcentral.com/marketwatch/) * [Press Releases](https://www.sdxcentral.com/press-releases/) * [Resources](https://www.sdxcentral.com/resources/) * Live Events * Xcelerated Compute Series * [The Xcelerated Compute Show | LDN 2026](https://www.xceleratedcompute.com/london/2026/) * [The Xcelerated Compute Show | MEX 2026](https://www.xceleratedcompute.com/cancun/2026/) * [The Xcelerated Compute Show | NYC 2027](https://www.xceleratedcompute.com/new-york/2027/) * Digital Infrastructure Series * [Yotta 2026](https://www.yotta-event.com/) * [Login / Create Account](https://www.sdxcentral.com/sdx-en/account/login/?next=%2Fnews%2Fnvidia-expands-nvlink-fusion-strategy-to-supercharge-custom-silicon-memory%2F) * [](https://www.sdxcentral.com/sdx-en/search/) Search * Show Menu * Channels * Back * [The AI Channel](https://www.sdxcentral.com/ai/) * [The Networking Channel](https://www.sdxcentral.com/network-sdn/) * [The Cybersecurity Channel](https://www.sdxcentral.com/security/) * [The Distributed Infrastructure Channel](https://www.sdxcentral.com/distributed-infrastructure/) * [The Telecom Channel](https://www.sdxcentral.com/telecom-nfv/) * [The Silicon & Supercomputing Channel](https://www.sdxcentral.com/storage-silicon/) * [The Cloud & Storage Channel](https://www.sdxcentral.com/cloud/) * Media * Back * [News](https://www.sdxcentral.com/news/) * [Analysis](https://www.sdxcentral.com/analysis/) * [Editors' Views](https://www.sdxcentral.com/control-plane/) * [Industry Views](https://www.sdxcentral.com/opinions/) * [Video Interviews](https://www.sdxcentral.com/video-interviews/) * [Broadcasts](https://www.sdxcentral.com/broadcasts/) * [On Demand Broadcasts](https://www.sdxcentral.com/broadcasts/past/) * [Explainers](https://www.sdxcentral.com/sdx-explainers/) * [MarketWatch](https://www.sdxcentral.com/marketwatch/) * [Press Releases](https://www.sdxcentral.com/press-releases/) * [Resources](https://www.sdxcentral.com/resources/) * Live Events * Back * Xcelerated Compute Series * [The Xcelerated Compute Show | LDN 2026](https://www.xceleratedcompute.com/london/2026/) * [The Xcelerated Compute Show | MEX 2026](https://www.xceleratedcompute.com/cancun/2026/) * [The Xcelerated Compute Show | NYC 2027](https://www.xceleratedcompute.com/new-york/2027/) * Digital Infrastructure Series * [Yotta 2026](https://www.yotta-event.com/) Close modal ## Search Suggestions [READ: How Meta re-engineered its storage stack for AI](https://www.sdxcentral.com/resources/the-storage-supplement/) * [Home](https://www.sdxcentral.com/) * [News](https://www.sdxcentral.com/news/) * [The Silicon & Supercomputing Channel](https://www.sdxcentral.com/storage-silicon/) # Nvidia expands NVLink Fusion strategy to supercharge custom silicon memory AWS taps new NVHBM to accelerate Trainium4 infrastructure August 27, 2026 By[Ben Wodecki](https://www.sdxcentral.com/profile/ben-wodecki/)[Have your say](https://www.sdxcentral.com/news/nvidia-expands-nvlink-fusion-strategy-to-supercharge-custom-silicon-memory/#comments) [Facebook](https://www.sdxcentral.com/#facebook)[Twitter](https://www.sdxcentral.com/#twitter)[LinkedIn](https://www.sdxcentral.com/#linkedin)[Reddit](https://www.sdxcentral.com/#reddit)[Email](https://www.sdxcentral.com/#email)[Share](https://www.addtoany.com/share#url=https%3A%2F%2Fwww.sdxcentral.com%2Fnews%2Fnvidia-expands-nvlink-fusion-strategy-to-supercharge-custom-silicon-memory%2F&title=Nvidia%20expands%20NVLink%20Fusion%20strategy%20to%20supercharge%20custom%20silicon%20memory%20-%20SDxCentral) – Ben Wodecki/SDxCentral Nvidia unveiled a custom die base aimed at accelerating memory bandwidth for custom silicon linked with its hardware. Dubbed NVHBM, the base-die innovation ties in with [NVLink Fusion](https://www.sdxcentral.com/news/nvidia-opens-nvlink-fabric-to-hyperscaler-custom-silicon/) and extends its high-speed NVLink backplane technology to partner specialized custom processing units (XPUs). It allows for increased memory bandwidth with high-bandwidth memory (HBM) when linking non-Nvidia accelerators with Nvidia hardware in rack-scale solutions. [](https://media.datacenterdynamics.com/media/images/image_5oikv6a.original.png)![Image 4: comparison of die area savings with NVHBM compared to standard HBM](./assets/img-8d131b8d.webp) Comparison of die area savings with NVHBM compared to standard HBM– Nvidia NVHBM sees memory controllers integrated directly into the 3D HBM stack instead of directly on the XPU board, a decision Nvidia contends brings up to 30% more memory bandwidth compared with standard high-bandwidth memory generation 4 (HBM4e) and as much as 15% lower power consumption. By removing HBM from the physical layer of the XPU it also widens the compute area, allowing for partner silicon designers to pack more power onto their devices. “Shrinking the memory interface connections enables the central AI compute die to expand into the newly freed space,” an [Nvidia technical blog](https://developer.nvidia.com/blog/nvidia-nvlink-fusion-brings-nvhbm-to-next-generation-ai-infrastructurehttps://developer.nvidia.com/blog/nvidia-nvlink-fusion-brings-nvhbm-to-next-generation-ai-infrastructure) reads. “This reclamation provides up to a 30% increase in available main-die silicon for compute or other features. The additional silicon area enables XPU designers to add more capabilities within a fixed package footprint. These improvements can help custom XPUs support larger models, read KV cache data faster, and improve training and large-scale inference.” Amazon’s custom silicon arm, Annapurna Labs is among the first partners to sign up for NVHBM. Amazon Web Services (AWS) is already an [NVLink Fusion partner](https://developer.nvidia.com/blog/aws-integrates-ai-infrastructure-with-nvidia-nvlink-fusion-for-trainium4-deployment/), with Trainium4s able to connect with Nvidia graphics processing units (GPUs). “NVHBM represents a new architectural approach to advancing high-bandwidth memory performance and efficiency,” Nafea Bshara, VP of Annapurna Labs at Amazon, noted. “We look forward to this technology collaboration to benefit future AWS infrastructure designs.” NVLink Fusion marked a huge departure for Nvidia, showing more will to connect with rival XPUs and central processing units (CPUs), but only as far as for use in Nvidia rack-scale platforms. AWS finds itself on an ever-growing list of partners, including [Qualcomm](https://www.sdxcentral.com/news/qualcomm-announces-data-center-cpus-will-support-nvidias-nvlink-fusion/), [Marvell](https://www.sdxcentral.com/news/nvidia-marks-marvell-for-ai-ran-silicon-photonics-work-with-a-2b-kicker/),[Ayar Labs](https://www.sdxcentral.com/news/ayar-labs-joins-nvlink-fusion-bringing-co-packaged-optics-to-nvidias-ai-infrastructure/), and [Fujitsu](https://global.fujitsu/en-global/pr/news/2025/10/03-01). Alongside the hyperscaler, Nvidia's arguably biggest get was [Arm](https://www.sdxcentral.com/news/nvidia-enlists-arm-as-nvlink-fusion-partner-in-major-ai-interconnect-coup/https://www.sdxcentral.com/news/nvidia-enlists-arm-as-nvlink-fusion-partner-in-major-ai-interconnect-coup/). The CPU [designer-turned-supplier](https://www.sdxcentral.com/news/arm-follows-nvidia-into-a-crowded-enterprise-cpu-race/) pledged support last September, with chiplet-based interconnect (UCIe) providing the bridge between its widely deployed processors and Nvidia hardware. Stay ahead of the latest silicon & supercomputing channel trends. Subscribe to SDxCentral. [Create an Account to Subscribe Now](https://www.sdxcentral.com/create-your-free-sdx-central-account-today/)