--- 格式版本: 2 标题: "Marvell targets AI memory woes with inference-boosting Bravera controller" 原文链接: "https://www.sdxcentral.com/news/marvell-targets-ai-memory-woes-with-inference-boosting-bravera-controller/" 发布日期: "2026-08-05" 发布时间校准状态: "found" 发布时间需复核: "否" 发布时间来源: "llm:local:strict_original_body" 发布时间证据: "August 05, 2026 ByBen WodeckiHave your say" 发布时间校准原因: "正文中明确标注发布日期为August 05, 2026，且位于标题附近，符合发布时间判定优先级。" 发布时间校准置信度: "1" 发布时间候选数量: 39 发布时间严格候选数量: 13 发布时间原页读取状态: "source template page reused from URL open" 发布时间未找到原因: "" 发布时间校准时间: "2026-08-28T16:26:44+08:00" 发布时间仲裁状态: "confirmed" 发布时间仲裁尝试次数: 1 发布时间仲裁耗时毫秒: 84998 发现时间: "2026-08-28T16:22:48+08:00" 入库时间: "2026-08-28T08:28:41.098Z" 来源平台: "SDxCentral 搜索" 搜索渠道: "source_template" 搜索词: "site:sdxcentral.com Marvell" 匹配关键词: - "GPU" - "Marvell" - "AI" - "CXL" - "performance" - "latency" - "bandwidth" - "throughput" 相关厂家: - "NVIDIA" - "Meta" 相关专家: [] 内容类型: "网页" 抓取工具: "Jina Reader" 清洗工具: "Jina Reader Markdown + Defuddle/Readability 正文提取" 原始附件: [] AI优质: "是" AI打分: 80 AI分档: "高置信优质" AI质检状态: "通过" AI打分理由: "正文主线是Marvell新推出的AI推理存储控制器及跨机架光子共享内存架构。SDxCentral属专业基础设施媒体，事实主要来自厂商披露。固定知识库未见Bravera SC6、PFMM或该组规格的历史记录；本文新增PCIe 6.0、16路NAND、3600 MT/s，以及跨机架50米、32Tb温KV缓存卸载和最高3倍令牌吞吐等可核验信息。商业信号仅到产品揭示，缺少客户、量产及可用时间。命中新架构/新产品通道，当前页面凭完整架构与规格报道本身具有保留价值。" AI质检模型: "gpt-5.6-sol" AI质检时间: "2026-08-28T16:28:52+08:00" AI主题相关性: 18 AI来源权威性: 12 AI新颖性: 18 AI技术细节: 18 AI商业部署信号: 5 AI完整性: 9 AI评分提示词版本: "v17-精简生产版" AI评分提示词SHA256: "48fb9777f386026761b4873eaff30807694fb11e9b352d7c69bf2dfde750cc7d" AI评分知识库版本: "knowledge_base_v1-20260819+runtime.18" AI评分知识库SHA256: "529905ea2a7a1b01b1a4ff01572528e2b6f0f5b2057e7bc6d264edb6520235a8" AI评分知识库检索词: "[\"GPU\",\"Marvell\",\"site:sdxcentral.com Marvell\",\"CXL\",\"PCIe\",\"RAS\",\"NPU\",\"XPU\",\"NVIDIA\",\"Meta\",\"URL\",\"SDxCentral\"]" AI评分知识库命中: "[{\"id\":\"runtime-b8cb239421f6cc07f924a9d9\",\"title\":\"Ex-Aruba CTO unveils optical startup armed with $900M to scale AI interconnectivity\",\"sourceType\":\"ai_excellent_article\",\"time\":\"2026-08-07\",\"matchedTerms\":[\"GPU\",\"Marvell\",\"RAS\",\"NVIDIA\",\"Meta\",\"URL\",\"SDxCentral\"],\"rank\":-13.00252588146215},{\"id\":\"july-correct-0088\",\"title\":\"StrataCL: Fabric-Native Communication Library for Production Supernodes - 智源社区论文\",\"sourceType\":\"labeled_article\",\"time\":\"2026-07\",\"matchedTerms\":[\"CXL\",\"NPU\",\"NVIDIA\",\"URL\"],\"rank\":-12.892751278880707},{\"id\":\"runtime-3dcabc270e938e0c3b6d5245\",\"title\":\"Nvidia wants to bypass the CPU with an open-source AI storage overhaul\",\"sourceType\":\"ai_excellent_article\",\"time\":\"2026-08-06\",\"matchedTerms\":[\"GPU\",\"RAS\",\"NVIDIA\",\"Meta\",\"URL\",\"SDxCentral\"],\"rank\":-12.851582674665643},{\"id\":\"runtime-5095d81c147567ab9111181d\",\"title\":\"Meta’s custom transport protocol embraces packet chaos to boost AI throughput\",\"sourceType\":\"ai_excellent_article\",\"time\":\"\",\"matchedTerms\":[\"GPU\",\"RAS\",\"Meta\",\"URL\",\"SDxCentral\"],\"rank\":-12.075434275604525},{\"id\":\"july-correct-0015\",\"title\":\"AMD to join the optical interconnect party with 2027 Instinct GPUs\",\"sourceType\":\"labeled_article\",\"time\":\"2026-07\",\"matchedTerms\":[\"GPU\",\"NVIDIA\",\"Meta\",\"URL\",\"SDxCentral\"],\"rank\":-11.44491742151597}]" AI摘要: "Marvell发布面向AI推理的Bravera SC6 SSD控制器，将KV缓存从GPU内存卸载至SSD以减少停顿；同时推出光子织物技术，可在50米范围内跨机架共享内存，最高卸载32Tb KV缓存并提升3倍token吞吐。" AI摘要模型: "ali-deepseek-v4-flash" AI摘要时间: "2026-09-07T02:08:33.944Z" 采集批次: "2026年8月28日16点22分01秒" 采集批次ID: "20260828-162201-542" 去重键: "https://www.sdxcentral.com/news/marvell-targets-ai-memory-woes-with-inference-boosting-bravera-controller" --- Title: Marvell targets AI memory woes with inference-boosting Bravera controller URL Source: https://www.sdxcentral.com/news/marvell-targets-ai-memory-woes-with-inference-boosting-bravera-controller/ Markdown Content: This website uses cookies to ensure you get the best experience on our website. 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Search Suggestions [READ: How Meta re-engineered its storage stack for AI](https://www.sdxcentral.com/resources/the-storage-supplement/) * [Home](https://www.sdxcentral.com/) * [News](https://www.sdxcentral.com/news/) * [The Networking Channel](https://www.sdxcentral.com/network-sdn/) # Marvell targets AI memory woes with inference-boosting Bravera controller Memory efficiency play sees reveal of photonic fabric to reduce GPU stalls August 05, 2026 By[Ben Wodecki](https://www.sdxcentral.com/profile/ben-wodecki/)[Have your say](https://www.sdxcentral.com/news/marvell-targets-ai-memory-woes-with-inference-boosting-bravera-controller/#comments) [Facebook](https://www.sdxcentral.com/#facebook)[Twitter](https://www.sdxcentral.com/#twitter)[LinkedIn](https://www.sdxcentral.com/#linkedin)[Reddit](https://www.sdxcentral.com/#reddit)[Email](https://www.sdxcentral.com/#email)[Share](https://www.addtoany.com/share#url=https%3A%2F%2Fwww.sdxcentral.com%2Fnews%2Fmarvell-targets-ai-memory-woes-with-inference-boosting-bravera-controller%2F&title=Marvell%20targets%20AI%20memory%20woes%20with%20inference-boosting%20Bravera%20controller%20-%20SDxCentral) ![Image 3: Marvell Technology office building in Santa Clara, California](./assets/img-ec2c0f40.webp) – Getty Images Marvell, the fabless chip firm labeled the “[next trillion-dollar company](https://www.sdxcentral.com/news/nvidia-ceo-says-ai-networking-could-make-marvell-the-next-trillion-dollar-company/)” by Nvidia CEO Jensen Huang, continued its AI infrastructure march with a solid-state drive (SSD) controller line aimed at boosting storage performance for AI inference workloads. The Bravera SC6 is a hyperscale-targeted PCIe 6.0 controller designed to smash memory bottlenecks. It acts as a high-capacity, low-cost tiered storage layer to enable [key-value (KV) cache](https://www.sdxcentral.com/analysis/why-kv-cache-is-key-to-ai-memory-woes/) – the context history generated during long AI sessions – to move from limited high-bandwidth graphic processing unit (GPU) memory to SSD to improve efficiency. The vendor claims the device is capable of supporting multigigabyte-per-second throughput and millions of random input/output operations per second (IOPS) to enable rapid access to datasets. By offloading information that surpasses accelerator memory to its high-capacity non-volatile (NAND) flash memory, Marvell’s Bravera line works to reduce GPU stalls and maintain system utilization. ![Image 4: SDxCentral Memory & Storage Supplement Cover](./assets/img-78bef442.webp) 25 Jun 2026 # [Memory & Storage Supplement 2026](https://www.sdxcentral.com/resources/the-storage-supplement/) How Meta, Weka, Vast, and Red Hat are rethinking storage as AI inference outpaces memory supply The card operates at 1.2-volt interfaces across 16 NAND data channels and supports speeds of up to 3,600 megatransfers per second (MT/s). Marvell said that while its Bravera SC6 controller is designed for hyperscale AI and cloud deployments, its “flexible” architecture provides a potential high-end outline for manufacturers to build more enterprise-centric options. “AI infrastructure is moving beyond isolated servers to systems where compute, memory, and connectivity operate seamlessly together,” Will Chu, EVP and GM of custom cloud solutions at Marvell, explained. “As AI scales, memory must scale more independently of compute so resources can be deployed where they deliver the greatest value.” AI inference workloads are skyrocketing in both complexity and speeds while memory architectures continue to lag behind. _SDxCentral_’s [Memory & Storage Supplement](https://www.sdxcentral.com/resources/the-storage-supplement/) details that hyperscalers like [Meta](https://www.sdxcentral.com/news/meta-rebuilds-its-ai-storage-stack-from-the-ground-up-to-stop-gpus-sitting-idle/) are re-architecting their storage stacks from the ground up to push past bottlenecks while reducing costs amid supply shortages. To further help hyperscalers scale AI infrastructure more efficiently, Marvell unveiled a series of photonic fabric technologies. These leverage its optical interconnect work, efforts that Gartner recently said made Marvell [the company to beat](https://www.sdxcentral.com/news/nvidia-crowned-ai-networkings-top-dog-but-its-throne-isnt-quite-safe/) for AI data center optical connectivity. A photonic fabric memory module (PFMM) pools and disaggregates memory across AI infrastructure, while a photonic fabric network interface card (NIC) acts as the bridge between host processors and the optical shared-memory fabric. Marvell said this multirack optical architecture would enable a new shared-memory tier across multiple customized processing units (XPUs) and racks up to 50 meters, enabling up to 32 terabits of warm KV cache offload with high bandwidth and low latency. Such a concept could drastically increase inference throughput and, as a result, boost efficiency of up to three-times higher token throughput within existing data center footprints The firm also provided a deeper look at its Structera X and A memory controller platforms. At a time when memory hardware costs are spiraling, the vendor wants to help infrastructure operators pool and disaggregate memory resources across servers. Based on the compute express link (CXL) architecture and first showcased some years ago, the latest look at the memory expansion lines sees Marvell’s pledge to optimize resource utilization at the rack-level to help try and bring down total cost of ownership. “With the industry’s broadest AI memory infrastructure portfolio, Marvell is helping customers improve utilization, boost token efficiency, and scale AI without compromising performance, power, or cost,” Chu added. Stay ahead of the latest networking channel trends. Subscribe to SDxCentral. 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