--- 格式版本: 2 标题: "Extending AIConfigurator to Intel XPU: Accelerating Cross-Platform LLM Deployment at Scale" 原文链接: "https://community.intel.com/t5/Blogs/Tech-Innovation/Data-Center/Extending-AIConfigurator-to-Intel-XPU-Accelerating-Cross/post/1755205" 发布日期: "2026-07-30" 发布时间校准状态: "found" 发布时间需复核: "否" 发布时间来源: "rule:scrape:provider_published_at" 发布时间证据: "provider publishedAt: 2026-07-30" 发布时间校准原因: "规则确认唯一严格发布时间，来源 scrape:provider_published_at" 发布时间校准置信度: "high" 发布时间候选数量: 3 发布时间严格候选数量: 1 发布时间原页读取状态: "source template page reused from URL open" 发布时间未找到原因: "" 发布时间校准时间: "2026-08-10T16:03:17+08:00" 发布时间仲裁状态: "skipped" 发布时间仲裁尝试次数: 0 发布时间仲裁耗时毫秒: 0 发现时间: "2026-08-10T15:56:26+08:00" 入库时间: "2026-08-10T08:03:18.223Z" 来源平台: "固定入口" 搜索渠道: "fixed_url" 搜索词: "https://community.intel.com/t5/Blogs/ct-p/blogs" 匹配关键词: - "XPU" - "deployment" - "GPU" - "performance" - "bandwidth" - "throughput" 相关厂家: - "Intel" - "NVIDIA" - "Meta" - "Microsoft" - "Google" 相关专家: [] 内容类型: "网页" 抓取工具: "Jina Reader" 清洗工具: "Jina Reader Markdown + Defuddle/Readability 正文提取" 原始附件: [] AI优质: "否" AI打分: 25 AI分档: "非优质" AI质检状态: "不通过" AI打分理由: "主题为LLM部署软件工具，不涉及超节点/AI Rack/机柜级系统等硬件架构；正文不完整且无技术参数或商业信号。" AI质检模型: "deepseek-v4-flash" AI质检时间: "2026-08-10T16:03:57+08:00" AI主题相关性: 5 AI来源权威性: 10 AI新颖性: 3 AI技术细节: 3 AI商业部署信号: 2 AI完整性: 2 采集批次: "2026年8月10日15点37分56秒" 采集批次ID: "20260810-153756-703" 去重键: "https://community.intel.com/t5/Blogs/Tech-Innovation/Data-Center/Extending-AIConfigurator-to-Intel-XPU-Accelerating-Cross/post/1755205" --- Title: Extending AIConfigurator to Intel XPU: Accelerating Cross-Platform LLM Deployment at Scale URL Source: https://community.intel.com/t5/Blogs/Tech-Innovation/Data-Center/Extending-AIConfigurator-to-Intel-XPU-Accelerating-Cross/post/1755205 Published Time: 2026-07-30T18:15:23.902Z Markdown Content: hidden text to trigger **early**_load_ of fonts Продукция**Продукция**_Продукция_ Продукция Các sản phẩm**Các sản phẩm**_Các sản phẩm_ Các sản phẩm المنتجات**المنتجات**_المنتجات_ المنتجات מוצרים**מוצרים**_מוצרים_ מוצרים [![Image 1: Intel logo - Return to the home page](https://www.intel.com/content/dam/logos/intel-header-logo.svg)](https://www.intel.com/content/www/us/en/homepage.html) Toggle Navigation 1. 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Every deployment decision — which hardware to run on, how to partition the model across GPUs, whether to use aggregated or disaggregated serving, how to allocate prefill vs. decode GPU pools, which batch size to target — interacts with every other. A single model on a single GPU type can yield tens of thousands of candidate configurations, and the space explodes further when you consider multiple hardware targets, inference frameworks (TensorRT-LLM, vLLM, SGLang), and SLA constraints. Exhaustive benchmarking is impractical, and manual heuristics inevitably leave performance on the table. [AIConfigurator](https://github.com/ai-dynamo/aiconfigurator) is an open-source tool built to tackle this complexity. Instead of running every possible configuration on real hardware, it decomposes LLM inference into its core operations (GEMM, attention, MoE, communication), profiles each one separately on the target GPU, and combines those measurements to predict end-to-end serving performance for any configuration — without running inference on real hardware at search time. A complete sweep across tens of thousands of configurations typically finishes in seconds on a CPU alone. Until recently, AIConfigurator was an NVIDIA-only story — deeply integrated with CUDA, NCCL, and NVIDIA GPU silicon data. Over a series of contributions, we extended AIConfigurator to support **Intel® Arc™ Pro graphics B60 GPU** — not just a new GPU, but a fundamentally different vendor stack — making it the first non-NVIDIA platform in the system. This post walks through what we delivered and, more importantly, why it matters. ## Why This Matters ### 1. Unlocking a Multi-Vendor Hardware Strategy Enterprise customers don't always have the luxury of choosing a single GPU vendor. Supply constraints, procurement timelines, pricing negotiations, and sovereign-cloud requirements all drive demand for hardware optionality. By enabling AIConfigurator on Intel XPU, we give customers a single tool to evaluate and deploy LLM workloads across both NVIDIA and Intel hardware — with the same analytical framework, projection methodology, and deployment artifact generation. This enables consistent, projection-based performance comparisons across vendors under identical workload assumptions — informing hardware selection with data-driven modeling rather than vendor-specific benchmarks. ### 2. Faster Time-to-Production on New Hardware Bringing a new LLM up on unfamiliar hardware typically involves extensive manual benchmarking — running every candidate configuration on real GPUs for each combination of model, quantization mode, and parallelism strategy — a process that can consume weeks of GPU time before a single production request is served. AIConfigurator eliminates this by evaluating each candidate configuration in milliseconds on CPU using pre-collected silicon data, and outputting ranked Pareto-optimal configurations with ready-to-deploy Kubernetes manifests. With XPU enablement, this same workflow is now available on Intel hardware — letting teams go from "first silicon access" to "production-ready configuration" in a fraction of the time required by manual benchmarking. ### 3. Strengthening the Platform's Credibility as a Cross-Platform Standard Before XPU, AIConfigurator's cross-platform design was an architectural aspiration — a modular system that could support other vendors but hadn't. With a non-NVIDIA vendor now successfully integrated end-to-end — from data collection through projection to deployment artifact generation — the extensibility is a demonstrated capability. This lowers the barrier for future platform integrations and signals that AIConfigurator is evolving toward a vendor-neutral configuration-optimization layer. ## What We Delivered AIConfigurator comprises three major components. **Collection** benchmarks individual kernel operations (GEMM, attention, MoE, communication) on the target GPU to produce silicon performance data. **Projection** loads this data into a performance database, estimates per-op latencies for the target model architecture, simulates end-to-end serving behavior, and sweeps the configuration space against SLA targets. **Output** ranks the SLA-compliant configurations into a Pareto-optimal frontier and generates deployment-ready Kubernetes manifests and launch scripts from the top-ranked candidates. ![Image 4: ShariCLawrence_0-1785432507429.png](https://community.intel.com/t5/image/serverpage/image-id/73495iA4AB02525528BF11/image-size/large?v=v2&px=999&whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright) _Figure 1: AIConfigurator architecture. Blue boxes indicate components modified for Intel XPU enablement; orange boxes are shared infrastructure that required no XPU-specific changes._ Intel XPU enablement spanned all three components, and the contributions fall into the following three categories: ### 1. End-to-End Pipeline on Intel XPU We established the full AIConfigurator pipeline on Intel XPU, including per-op collection scripts for GEMM, attention, MoE, and AllReduce on the vLLM backend, an XPU system specification integrated into the SDK, and a projection flow decoupled from CUDA dependencies — enabling the entire search and artifact generation pipeline to run on a non-NVIDIA device stack. A full oneCCL communication backend was also added as the XPU counterpart to NCCL, integrating transparently into the SDK as an automatic fallback when NCCL data is absent. ### 2. Model Coverage We extended support to both dense and MoE architectures on XPU, covering FP16, BF16, FP8, and MXFP4 quantization formats across models such as Llama-3.1-8B, Llama-3.1-70B (FP16/FP8), GPT-OSS-20B, and GPT-OSS-120B (MXFP4). The enablement spans aggregated and disaggregated serving modes, including both homogeneous and heterogeneous disaggregated configurations. Along the way, we resolved several model architecture issues to improve projection accuracy — correcting the dense and MoE model definitions to account for vocab-parallel embedding, fixing embedding memory accounting, adding the missing embedding AllReduce ops needed to broadcast sharded results into the first attention layer, and extending the attention collector to support sliding window attention and a wide range of head dimensions for GPT-OSS architectures. ### 3. Cross-Platform Bug Fixes We contributed fixes that benefited the entire platform — including heterogeneous disaggregated serving with independent GPU budgets for the prefill and decode pools (a prerequisite for asymmetric prefill/decode GPU allocation), search space filtering for invalid vLLM parallelism configurations under expert parallelism, NFS-compatible collection logging to unblock multi-worker data collection on shared filesystems, and GEMM dtype correctness. Hence, bfloat16 measurements are no longer mislabeled as float16 in the perf database, and end-to-end chunked prefill support is exposed through the CLI to match vLLM's default scheduling behavior. ## How It Works With the XPU pipeline in place, the AIConfigurator workflow on Intel B60 mirrors NVIDIA's — from installation through search to deployment artifacts. ### 1. Installation AIConfigurator is published on [PyPI](https://pypi.org/project/aiconfigurator/). The results in this post were generated from a [pinned source build](https://github.com/ai-dynamo/aiconfigurator/tree/e97f214a) for exact reproducibility: # Install from PyPI pip install aiconfigurator # Or build from source (results in this post were generated at commit e97f214a) git clone https://github.com/ai-dynamo/aiconfigurator.git cd aiconfigurator && git checkout e97f214a && git lfs pull pip install . ### 2. Homogeneous Serving on Intel B60 As a concrete example, consider deploying Llama-3.1-8B-Instruct on 8 Intel B60 GPUs using vLLM. The workload targets long-context inference with input sequence length (ISL) of 8192 and output sequence length (OSL) of 1024, with SLA constraints of time to first token (TTFT) ≤ 6000ms and time per output token (TPOT) ≤ 30ms. Using a single command, AIConfigurator searches through hundreds of candidate configurations: aiconfigurator cli default \     --model meta-llama/Llama-3.1-8B-Instruct \     --total-gpus 8 --system b60 \     --backend vllm --backend-version 0.20.0 \     --isl 8192 --osl 1024 \     --ttft 6000 --tpot 30 \     --enable-chunked-prefill \     --save-dir ./results In seconds on CPU, AIConfigurator sweeps hundreds of aggregated and disaggregated candidate configurations using silicon data collected on B60, filters those that satisfy the SLA constraints, and returns the Pareto frontier comparing both serving modes: ![Image 5: ShariCLawrence_1-1785432507436.png](https://community.intel.com/t5/image/serverpage/image-id/73497iAB18A1C47B5C4DAD/image-size/large?v=v2&px=999&whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright) _Figure 2: **Projection.** Pareto frontier for Llama-3.1-8B on 8 Intel B60 GPUs. Each point represents a configuration that satisfies the TTFT constraint. Aggregated serving (blue) is projected to remain above disaggregated (orange) across the entire Pareto frontier for this model/GPU combination._ Along with the frontier, AIConfigurator also emits ready-to-deploy vLLM engine configurations and Kubernetes manifests for the top-ranked candidates. The output tells the user which serving mode (aggregated vs. disaggregated), how many replicas, how many GPUs per replica, which parallelism layout (TP/PP), and which target batch size best fits their workload — a decision that would otherwise require days of manual benchmarking. ### 3. Heterogeneous Disaggregated Serving Enterprise data centers rarely operate homogeneous GPU fleets. Procurement cycles, generational upgrades, and supply constraints often result in a mix of GPU types across the infrastructure. Disaggregated LLM serving — where the prefill and decode phases run on separate GPU pools — presents an inherent opportunity to leverage this heterogeneity: assign compute-intensive prefill to one GPU type and memory-bandwidth-sensitive decode to another. With XPU enablement, AIConfigurator now supports cross-vendor heterogeneous disaggregated serving, projecting end-to-end performance across mixed GPU fleets. Using **aiconfigurator cli exp** with a YAML config, we can assign each phase to a different vendor's hardware. In this example, we use Intel B60 for prefill and NVIDIA L40S for decode within the same 8-GPU budget: # hetero_disagg.yaml hetero_b60_l40s:   model_path: meta-llama/Llama-3.1-8B-Instruct   system_name: b60   decode_system_name: l40s   backend_name: vllm   serving_mode: disagg   total_gpus: 8   isl: 8192   osl: 1024   ttft: 6000   tpot: 30   config:     replica_config:       max_prefill_gpus: 4       max_decode_gpus: 4     prefill_worker_config:       system_name: b60       backend_name: vllm       backend_version: 0.20.0     decode_worker_config:       system_name: l40s       backend_name: vllm       backend_version: 0.14.0 exps: [hetero_b60_l40s]aiconfigurator cli exp --yaml-path hetero_disagg.yaml --save-dir ./results AIConfigurator exhaustively searches all valid GPU splits, parallelism strategies, and batch sizes under the SLA constraints and per-pool GPU budgets (max_prefill_gpus and max_decode_gpus), and returns the ranked disaggregated configurations along with the corresponding prefill/decode worker layouts. #### 3.1 Heterogeneous Disaggregated Strategy Analysis In heterogeneous disaggregated serving, the phase-to-hardware mapping directly determines whether the deployment can fully exploit each GPU's architectural strengths — an incorrect assignment leaves compute and memory bandwidth underutilized on both sides. Because AIConfigurator can project any phase-to-hardware mapping in seconds, it lets users compare candidate mappings side-by-side — for example, running Intel B60 as the prefill pool with NVIDIA L40S as the decode pool, versus the reverse — under identical workload and SLA constraints. Concretely, we ran the same aiconfigurator cli exp command twice — once with the YAML above (B60 prefill, L40S decode), and once with system_name and decode_system_name swapped (L40S prefill, B60 decode) — and plotted both projected Pareto frontiers in Figure 3. ![Image 6: ShariCLawrence_2-1785432507439.png](https://community.intel.com/t5/image/serverpage/image-id/73496i2811B30122F70D79/image-size/large?v=v2&px=999&whitelist-exif-data=Orientation%2CResolution%2COriginalDefaultFinalSize%2CCopyright) _Figure 3: **Projection.** Throughput comparison between two role assignments on 4 B60 + 4 L40S GPUs for Llama-3.1-8B. Each point represents a Pareto-optimal configuration; stars mark the best SLA-compliant configuration for each scenario._ The projection shows that the B60-prefill / L40S-decode mapping is projected to remain above the reverse mapping across the entire Pareto frontier. Matching each phase to the GPU architecture it favors — compute-heavy prefill, bandwidth-heavy decode — consistently outperforms the reverse assignment. The value of doing this analysis inside AIConfigurator is that the same exhaustive search would otherwise require provisioning hardware from both vendors and running end-to-end inference benchmarks across every valid GPU split, parallelism strategy, and batch size under SLA constraints — a process that can consume days or weeks of GPU time and engineering effort. Inside AIConfigurator it completes in seconds on CPU. **A note on projection fidelity:** AIConfigurator's projection engine relies on a set of empirically calibrated correction factors, which account for effects such as prefill queueing, KV-cache transfer overhead, and decode batch-size saturation. These factors were originally tuned on NVIDIA hardware. Improving the projection accuracy for broader vendor coverage is an area of ongoing work. ## Conclusion Enabling AIConfigurator on Intel XPU is more than a platform port. It's a proof point that **automated LLM deployment optimization can — and should — be hardware-agnostic**. As the LLM serving landscape expands beyond a single vendor, the ability to evaluate, configure, and deploy across hardware platforms from a single system becomes strategically important. For customers, it means fewer manual benchmarks, fast deployment cycles, and data-driven hardware decisions across vendors. For the platform, this means a broader addressable market and stronger network effects, as each new hardware integration increases the system's value for all users. And for the broader LLM serving ecosystem, it means the configuration optimization layer is moving toward a shared, vendor-neutral foundation — one whose extensibility has now been validated in practice. Looking ahead, we plan to broaden model and backend coverage on XPU, continue refining projection accuracy, and apply the cross-platform patterns established here to future hardware integrations. **Notices and Disclaimers** All results are projections generated by AIConfigurator (commit e97f214a, [https://github.com/ai-dynamo/aiconfigurator](https://github.com/ai-dynamo/aiconfigurator)) on the hardware, software, model, workload, and SLA configurations stated in the text and figures. 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